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Microchip Technology /ATSAML11E15A /OSCCTRL /DFLLULPCTRL

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Interpret as DFLLULPCTRL

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15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ENABLE)ENABLE 0 (BINSE)BINSE 0 (SAFE)SAFE 0 (DITHER)DITHER 0 (RUNSTDBY)RUNSTDBY 0 (ONDEMAND)ONDEMAND 0 (DIV1)DIV

DIV=DIV1

Description

DFLLULP Control

Fields

ENABLE

Enable
BINSE

Binary Search Enable
SAFE

Tuner Safe Mode
DITHER

Tuner Dither Mode
RUNSTDBY

Run in Standby
ONDEMAND

On Demand
DIV

Division Factor

0 (DIV1): Frequency Divided by 1

1 (DIV2): Frequency Divided by 2

2 (DIV4): Frequency Divided by 4

3 (DIV8): Frequency Divided by 8

4 (DIV16): Frequency Divided by 16

5 (DIV32): Frequency Divided by 32

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data